About me
I am a first-year Ph.D. student at The Hong Kong University of Science and Technology (Guangzhou) (HKUST(GZ)), advised by Prof. Hongce Zhang. Prior to this, I received my M.S.E degree from University of Electronic Science and Technology of China (UESTC) and my B.E. degree from South China Agricultural University (SCAU).
Previously, I interned as a Research Assistant at The Hong Kong University of Science and Technology (Guangzhou) and interned at the Guangdong Institute of Intelligence Science and Technology (GDIIST).
My current research interests focus on electronic design automation (EDA), especially in hardware formal verification and LLM for EDA. Meanwhile, I am also interested in related research topics and welcome discussions and collaborations with researchers from different fields.
🔥 News
- 2026.01: 🌐 Launched and updated my new academic homepage.
Publications
- CondEC: Equivalence Checking under Conditions
Wenbin Che, Changyuan Yu, Hongce Zhang
International Symposium of Electronics Design Automation (ISEDA), 2026 - FRAIG-BMC: Functional Reduction to Speed Up Bounded Model Checking
Changyuan Yu, Wenbin Che, Hongce Zhang
arxiv, 2025 - FPGA-based memory test system design and test algorithm implementation
Wenbin Che
International Conference on Electronic Information Engineering and Computer (EIECT), 2023
Educations
Internships
Honors and Awards
- 2022.11 First Class of Graduate Academic Scholarship in UESTC.
- 2023.11 Third Class of Graduate Academic Scholarship in UESTC.
- 2023.06 Second Prize in the 6th China Graduate Innovation Chip Competition at the UESTC.
- 2023.08 Excellent Award at the 6th China Graduate Innovation Chip Competition National Competition.